Advanced Computer Architecture at EPFL.
-
Updated
Oct 12, 2021 - VHDL
Advanced Computer Architecture at EPFL.
Detect timing attacks, cache timing, and branch prediction vulnerabilities
Analysis of the relationship between efficiency, power consumption and AVF (Architectural Vulnerability Factor)
Data and Figures Generation for my MSc Thesis on Cache Timing Attack using Electromagnetic Side-Channels
Browser-based timing side-channel attack demo — string comparison leakage, HMAC verification timing, RSA private key bit leakage, and cache-timing attacks with real performance.now() measurements and constant-time defenses. No backends. No simulated timing.
Add a description, image, and links to the cache-timing topic page so that developers can more easily learn about it.
To associate your repository with the cache-timing topic, visit your repo's landing page and select "manage topics."