I’m an undergraduate student in Electronics and Telecommunication Engineering at Jadavpur University, interested in digital design, computer architecture, and low-level system development.

I work mainly on processor design and RTL-based projects, focusing on understanding how systems are built from basic components. I enjoy implementing ideas from scratch and experimenting with different architectural approaches.

Alongside processor design, I have hands-on experience with Verilog and digital logic design, and I like exploring how software concepts map to hardware implementations.

I’m also interested in open-source contributions and learning by reading, modifying, and improving existing codebases.

📫 Always open to collaboration and learning.

Thanks for visiting.